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init: DLD154V4B 单路车检器项目

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wangfq
2026-06-22 18:20:37 +08:00
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utilities/at32f421_freertos_demo/inc/FreeRTOSConfig.h Normal file
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/*
FreeRTOS V10.4.3 - Copyright (C) 2020 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
#include <stdint.h>
#include "system_at32f421.h"
#endif
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( ( unsigned long ) system_core_clock )
#define configTICK_RATE_HZ ( ( TickType_t ) 1000 )
#define configMAX_PRIORITIES ( 5 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 128 )
#define configSUPPORT_DYNAMIC_ALLOCATION 1
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 8 * 1024 ) )
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetCurrentTaskHandle 1
/* Cortex-M specific definitions. */
#ifdef __NVIC_PRIO_BITS
/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
#define configPRIO_BITS __NVIC_PRIO_BITS
#else
#define configPRIO_BITS 4 /* 15 priority levels */
#endif
/* The lowest interrupt priority that can be used in a call to a "set priority"
function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0x0f
/* The highest interrupt priority that can be used by any interrupt service
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 0x01
/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* Normal assert() semantics without relying on the provision of an assert.h
header file. */
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
standard names. */
#define vPortSVCHandler SVC_Handler
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
#endif /* FREERTOS_CONFIG_H */

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/**
**************************************************************************
* @file TaskLoop.h
* @version v1.0
* @date 2025-09-08
* @brief 地感功能的实现
**************************************************************************
* Copyright notice & Disclaimer
* * Create 2025-09-08 by wangfq
* *
**************************************************************************
*/
#ifndef __TASKLOOP_H__
#define __TASKLOOP_H__
#include <stdint.h>
#define HOLD_TIME 5*1200
#define LC_HOLD_TIME 4*1200 //时间4分钟
#define IN_DELAY 10
#define OUT_DELAY 39
#define PLUSE_DELAY 10
#define MAX_CMP_LOOP_UNIT 4 // 5 组
#define MAX_CMP_DIF 20 //
#define MAX_TIMEOUT_CMP 120000 // 5毫秒 为单位， 表示10分钟， 600秒
#define ALFA_CAP1 79
#define ALFA_CAP2 64
#define ALFA_ORG1 64
#define ALFA_ORG2 64
#define XNSUM_FOR_ORIGIN_FACTOR 6 //7 //8 //7 //6
extern uint8_t loop1_INI_LOOP;
extern uint8_t loop1_CAP_OK;
extern uint8_t loop1_CAP_FLAG;
extern uint8_t loop1_VD_FLAG;
extern uint8_t loop1_VD_HOLD;
extern uint8_t loop1_RF_FLAG;
extern uint8_t loop1_LOOP_OK;
extern uint8_t loop1_LOOP_OK0;
extern uint8_t loop1_FLAG_IN;
extern uint8_t loop1_FLAG_OUT;
extern uint8_t loop1_FLAG_PLUSE;
extern uint8_t loop1_FLAG_PLUSE_DELAY;
extern uint8_t loop1_FLAG_IN_PLUSE;
extern uint8_t loop1_FLAG_CUT;
extern uint8_t SET_PLUS; //输出方式
extern uint32_t g_xn_counter;
extern uint8_t g_flag_stable_delta2_flt;
// 二阶变化量计算状态结构体
typedef struct {
int16_t delta_prev; // 上一次的一阶变化量
int16_t delta2_flt; // 滤波后的二阶变化量
} SecondOrderState;
extern SecondOrderState second_order_state;
#define SECOND_ORDER_FILTER_COEF 64 // 滤波系数（64/256=0.25）
// 一阶滤波管理全局状态
typedef struct {
uint8_t flag_not_idle;
uint32_t counter_not_idle;
uint8_t flag_init_value;
uint32_t stable_init_value; // 开机稳定初始值
uint8_t flag_5sec;
uint16_t counter_5sec;
uint32_t recent_5sec;
// uint8_t flag_5min;
// uint32_t counter_5min;
// uint16_t recent_5min; // 最近5分钟的一阶滤波值
// uint8_t flag_10min;
// uint32_t counter_10min;
// uint16_t recent_10min; // 最近10分钟的一阶滤波值
// uint8_t flag_30min;
// uint32_t counter_30min;
// uint16_t recent_30min; // 最近半小时的一阶滤波值
// uint8_t flag_60min;
// uint32_t counter_60min;
// uint16_t recent_60min; // 最近1小时的一阶滤波值
uint32_t init_sum; // 初始化累加值
uint16_t init_samples; // 初始化采样计数器
uint8_t is_initialized; // 初始化完成标志
uint32_t init_freq; // 初始频率
uint32_t current_freq;
uint16_t cnt_sec_samples;
uint32_t sum_sec_samples;
uint16_t cnt_samples;
uint32_t sum_samples;
uint8_t flag_flat_release;
uint16_t cnt_flat_release;
uint16_t max_cnt_flat_release;
uint32_t last_loop_Origin;
uint8_t flag_loop_reconnect; // 线圈重连
uint16_t cnt_loop_reconnect;
uint8_t last_loop_vd_flag;
uint16_t window_size;
uint8_t flag_second_judge; // 进入第二轮判断；由于第一轮判定为有车状态超时了，那么进入第二轮判定，第二轮判定会默认当前无车开始
uint32_t second_loop_Origin;
uint32_t second_loop_ORG_SUM; // for option use
uint16_t second_loop_ORG_CNT;
uint32_t second_loop_dlt_ORG;
uint8_t second_loop_vd_flag;
// 二次判断增强条件
uint32_t second_judge_enter_time; // 进入二次判断的时间戳（单位：5ms）
uint16_t second_judge_min_time; // 二次判断最小时间限制（单位：5ms），默认10秒=2000
uint16_t cnt_stable_to_idle; // 连续检测到恢复到空闲值的计数
uint16_t stable_to_idle_threshold; // 恢复到空闲值的阈值次数
uint16_t cnt_not_idle;
uint16_t cnt_idle;
uint16_t cnt_simple_release;
uint16_t cnt_simple_busy;
// 从无车到有车 从有车到无车
// 频率的变化趋势： 频率变大 频率变小
// 捕获值的变化趋势： 值变小 值变大
// 电感量的变化趋势 值变小 值变大
uint16_t cnt_release_Up; // 从有车到无车时，一阶变化量 正数，一阶变化量是新捕获值与上一次捕捉值的差，
uint16_t cnt_release_Down; // 从有车到无车时，一阶变化量 负数，此时可能倒车？或者出车的过程中有其他更有影响的部件，如前轮和后轮部分
uint16_t min_release_capvd; // 从有车到无车时，U字形 拐点处的 一阶滤波值
} FltHistoryManager;
extern FltHistoryManager flt_mgr ; // <20><>ʼ<EFBFBD><CABC>Ϊ0
// 初始化采样次数（例如100次）
#define INIT_SAMPLE_COUNT 10 //40 // 200
#define TMP_SAMPLE_COUNT 50
// 区间类型定义（绝对差值或百分比）
typedef enum {
RANGE_ABSOLUTE, // 绝对差值（如 ±50）
RANGE_PERCENT // 百分比（如 ±10%）
} RangeType;
// 阶段配置结构体（每个时间窗口的区间规则）
typedef struct {
uint32_t base_value; // 基准值（例如开机稳定值、最近5分钟值等）
uint32_t lower;
uint32_t upper;
uint16_t range_size; // 区间大小（绝对值或百分比数值）
RangeType range_type; // 区间类型（绝对或百分比）
} StageRangeConfig;
// 全局阶段配置数组（示例：开机、5分钟、10分钟、30分钟、1小时）
#define STAGE_COUNT 2
#define STAGE_COUNT_SHORT 2
extern StageRangeConfig stage_config[STAGE_COUNT];
void loop_task_function(void *pvParameters);
#endif

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/**
**************************************************************************
* @file at32f421_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F421_CLOCK_H
#define __AT32F421_CLOCK_H
#ifdef __cplusplus
extern "C" {
#endif
/* includes ------------------------------------------------------------------*/
#include "at32f421.h"
/* exported functions ------------------------------------------------------- */
void system_clock_config(void);
#ifdef __cplusplus
}
#endif
#endif /* __AT32F421_CLOCK_H */

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/**
**************************************************************************
* @file at32f421_conf.h
* @brief at32f421 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F421_CONF_H
#define __AT32F421_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief in the following line adjust the value of high speed external crystal (hext)
* used in your application
*
* tip: to avoid modifying this file each time you need to use different hext, you
* can define the hext value in your toolchain compiler preprocessor.
*
*/
#if !defined HEXT_VALUE
#define HEXT_VALUE ((uint32_t)12000000) /*!< value of the high speed external crystal in hz */
#endif
/**
* @brief in the following line adjust the high speed external crystal (hext) startup
* timeout value
*/
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
#define LEXT_VALUE ((uint32_t)32768) /*!< value of the low speed external clock in hz */
/* module define -------------------------------------------------------------*/
#define CRM_MODULE_ENABLED
#define CMP_MODULE_ENABLED
#define TMR_MODULE_ENABLED
#define ERTC_MODULE_ENABLED
#define GPIO_MODULE_ENABLED
#define I2C_MODULE_ENABLED
#define USART_MODULE_ENABLED
#define PWC_MODULE_ENABLED
#define ADC_MODULE_ENABLED
#define SPI_MODULE_ENABLED
#define DMA_MODULE_ENABLED
#define DEBUG_MODULE_ENABLED
#define FLASH_MODULE_ENABLED
#define CRC_MODULE_ENABLED
#define WWDT_MODULE_ENABLED
#define WDT_MODULE_ENABLED
#define EXINT_MODULE_ENABLED
#define MISC_MODULE_ENABLED
#define SCFG_MODULE_ENABLED
/* includes ------------------------------------------------------------------*/
#ifdef CRM_MODULE_ENABLED
#include "at32f421_crm.h"
#endif
#ifdef CMP_MODULE_ENABLED
#include "at32f421_cmp.h"
#endif
#ifdef TMR_MODULE_ENABLED
#include "at32f421_tmr.h"
#endif
#ifdef ERTC_MODULE_ENABLED
#include "at32f421_ertc.h"
#endif
#ifdef GPIO_MODULE_ENABLED
#include "at32f421_gpio.h"
#endif
#ifdef I2C_MODULE_ENABLED
#include "at32f421_i2c.h"
#endif
#ifdef USART_MODULE_ENABLED
#include "at32f421_usart.h"
#endif
#ifdef PWC_MODULE_ENABLED
#include "at32f421_pwc.h"
#endif
#ifdef ADC_MODULE_ENABLED
#include "at32f421_adc.h"
#endif
#ifdef SPI_MODULE_ENABLED
#include "at32f421_spi.h"
#endif
#ifdef DMA_MODULE_ENABLED
#include "at32f421_dma.h"
#endif
#ifdef DEBUG_MODULE_ENABLED
#include "at32f421_debug.h"
#endif
#ifdef FLASH_MODULE_ENABLED
#include "at32f421_flash.h"
#endif
#ifdef CRC_MODULE_ENABLED
#include "at32f421_crc.h"
#endif
#ifdef WWDT_MODULE_ENABLED
#include "at32f421_wwdt.h"
#endif
#ifdef WDT_MODULE_ENABLED
#include "at32f421_wdt.h"
#endif
#ifdef EXINT_MODULE_ENABLED
#include "at32f421_exint.h"
#endif
#ifdef MISC_MODULE_ENABLED
#include "at32f421_misc.h"
#endif
#ifdef SCFG_MODULE_ENABLED
#include "at32f421_scfg.h"
#endif
#ifdef __cplusplus
}
#endif
#endif

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/**
**************************************************************************
* @file at32f421_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F421_INT_H
#define __AT32F421_INT_H
#ifdef __cplusplus
extern "C" {
#endif
/* includes ------------------------------------------------------------------*/
#include "at32f421.h"
/* exported types ------------------------------------------------------------*/
/* exported constants --------------------------------------------------------*/
/* exported macro ------------------------------------------------------------*/
/* exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
#ifdef __cplusplus
}
#endif
#endif

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/**
**************************************************************************
* @file cmcng.h
* @version v1.0
* @date 2025-09-08
* @brief һЩÅäÖÃ
**************************************************************************
* Copyright notice & Disclaimer
* * Create 2025-09-08 by wangfq
* *
**************************************************************************
*/
#ifndef __CMCNG_H__
#define __CMCNG_H__
#define PRODUCT_MODEL "DLD154"
#define FIRMWARE_VER "4.00"
#define HARDWARE_VER "3.00"
#define FIRMWARE_VER_MAIN 4
#define FIRMWARE_VER_SUB 2
#define HARDWARE_VER_MAIN 3
#define HARDWARE_VER_SUB 0
#include <stdio.h>
#include <stdint.h>
#ifdef DEBUG
#define PRINT(X...) printf(X)
#else
#define PRINT(X...)
#endif
typedef struct _LOOP_ACS_INFO
{
uint8_t flag_event;
uint8_t loop_num;
uint8_t freq_level;
uint8_t sensity;
uint8_t relay1_cng;
uint8_t relay1_state;
uint8_t relay2_cng;
uint8_t relay2_state;
uint8_t loop_state;
uint8_t output_mode;
uint8_t dir_mode;
uint8_t delay;
uint8_t car_state;
uint8_t direction;
uint8_t flag_loop_safe;
uint32_t loop_safe_counter;
uint8_t condition;
uint32_t frequent;
uint32_t loop_capvd;
int16_t variation;
uint32_t event_counter;
uint32_t report_counter;
} Loop_ACS_Info;
extern Loop_ACS_Info g_loop_acs_info;
extern uint8_t g_flag_output;
extern uint8_t g_flag_output2;
extern uint8_t g_input_div;
#endif

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/**
**************************************************************************
* @file at32f421_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* includes ------------------------------------------------------------------*/
#include "at32f421_clock.h"
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* system clock (sclk) = hext * pll_mult
* system clock source = pll (hext)
* - hext = HEXT_VALUE
* - sclk = 120000000
* - ahbdiv = 1
* - ahbclk = 120000000
* - apb2div = 1
* - apb2clk = 120000000
* - apb1div = 1
* - apb1clk = 120000000
* - pll_mult = 15
* - flash_wtcyc = 3 cycle
* @param none
* @retval none
*/
void system_clock_config(void)
{
/* reset crm */
crm_reset();
/* config flash psr register */
flash_psr_set(FLASH_WAIT_CYCLE_3);
crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
/* wait till hext is ready */
while(crm_hext_stable_wait() == ERROR)
{
}
/* config pll clock resource */
crm_pll_config(CRM_PLL_SOURCE_HEXT, CRM_PLL_MULT_10);
/* enable pll */
crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
/* wait till pll is ready */
while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
{
}
/* config ahbclk */
crm_ahb_div_set(CRM_AHB_DIV_1);
/* config apb2clk, the maximum frequency of APB1/APB2 clock is 120 MHz */
crm_apb2_div_set(CRM_APB2_DIV_1);
/* config apb1clk, the maximum frequency of APB1/APB2 clock is 120 MHz */
crm_apb1_div_set(CRM_APB1_DIV_1);
/* enable auto step mode */
crm_auto_step_mode_enable(TRUE);
/* select pll as system clock source */
crm_sysclk_switch(CRM_SCLK_PLL);
/* wait till pll is used as system clock source */
while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
{
}
/* disable auto step mode */
crm_auto_step_mode_enable(FALSE);
/* update system_core_clock global variable */
system_core_clock_update();
}

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/**
**************************************************************************
* @file at32f421_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* includes ------------------------------------------------------------------*/
#include "at32f421_int.h"
/** @addtogroup FreeRTOS_demo
* @{
*/
/**
* @brief this function handles nmi exception.
* @param none
* @retval none
*/
void NMI_Handler(void)
{
}
/**
* @brief this function handles hard fault exception.
* @param none
* @retval none
*/
void HardFault_Handler(void)
{
/* go to infinite loop when hard fault exception occurs */
while(1)
{
}
}
/**
* @brief this function handles memory manage exception.
* @param none
* @retval none
*/
void MemManage_Handler(void)
{
/* go to infinite loop when memory manage exception occurs */
while(1)
{
}
}
/**
* @brief this function handles bus fault exception.
* @param none
* @retval none
*/
void BusFault_Handler(void)
{
/* go to infinite loop when bus fault exception occurs */
while(1)
{
}
}
/**
* @brief this function handles usage fault exception.
* @param none
* @retval none
*/
void UsageFault_Handler(void)
{
/* go to infinite loop when usage fault exception occurs */
while(1)
{
}
}
/**
* @brief this function handles svcall exception.
* @param none
* @retval none
*/
//void SVC_Handler(void)
//{
//}
/**
* @brief this function handles debug monitor exception.
* @param none
* @retval none
*/
void DebugMon_Handler(void)
{
}
/**
* @brief this function handles pendsv_handler exception.
* @param none
* @retval none
*/
//void PendSV_Handler(void)
//{
//}
/**
* @brief this function handles systick handler.
* @param none
* @retval none
*/
//void SysTick_Handler(void)
//{
//}
/**
* @}
*/
/**
* @}
*/

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/**
**************************************************************************
* @file include_port.c
* @brief include_port program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/** @addtogroup UTILITIES_examples
* @{
*/
/** @addtogroup FreeRTOS_demo
* @{
*/
/* support ac5 and ac6 compiler */
#if (__ARMCC_VERSION > 6000000)
#include "..\..\..\middlewares\freertos\source\portable\GCC\ARM_CM3\port.c"
#else
#include "..\..\..\middlewares\freertos\source\portable\rvds\ARM_CM3\port.c"
#endif
/**
* @}
*/
/**
* @}
*/

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/**
**************************************************************************
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
#include "at32f421_board.h"
#include "at32f421_clock.h"
#include "FreeRTOS.h"
#include "task.h"
#include "cmcng.h"
#include "TaskLoop.h"
/** @addtogroup UTILITIES_examples
* @{
*/
/** @addtogroup FreeRTOS_demo
* @{
*/
crm_clocks_freq_type g_crm_clocks_freq_struct = {0};
tmr_input_config_type g_tmr_input_config_struct;
__IO uint32_t sys_counter = 0;
uint8_t g_input_div = 1;
TaskHandle_t loop_task_handler;
tmr_output_config_type tmr_oc_init_structure;
/*
pb1 output pwm waveform, use Tmr14.
tmr3 channel1 duty cycle = (tmr3_c1dt/ tmr3_pr)* 100 = 50%
tmr3 channel2 duty cycle = (tmr3_c2dt/ tmr3_pr)* 100 = 37.5%
tmr3 channel3 duty cycle = (tmr3_c3dt/ tmr3_pr)* 100 = 25%
tmr3 channel4 duty cycle = (tmr3_c4dt/ tmr3_pr)* 100 = 12.5%
*/
uint16_t c1dt_val = 333;
//uint16_t c2dt_val = 249;
//uint16_t c3dt_val = 166;
//uint16_t c4dt_val = 83;
uint16_t prescaler_value = 0;
__IO uint16_t pulse=0;//55; //脉冲宽度
uint8_t g_pulse_counter = 0;
uint8_t g_flag_pulse = 1;
/* Basic timr6 */
void Timr6_Init(void)
{
crm_periph_clock_enable(CRM_TMR6_PERIPH_CLOCK, TRUE);
//TODO: 定时的计算方法
// tmr_base_init(TMR6, 9999, (g_crm_clocks_freq_struct.ahb_freq / 10000) - 1); // 1s
tmr_base_init(TMR6, 999, (g_crm_clocks_freq_struct.ahb_freq / 1000000) - 1); // 1ms
tmr_cnt_dir_set(TMR6, TMR_COUNT_UP);
tmr_interrupt_enable(TMR6, TMR_OVF_INT, TRUE);
nvic_irq_enable(TMR6_GLOBAL_IRQn, 0, 0);
tmr_counter_enable(TMR6, TRUE);
// crm_periph_clock_enable(CRM_TMR14_PERIPH_CLOCK, TRUE);
//
// //TODO: 定时的计算方法
//// tmr_base_init(TMR6, 9999, (g_crm_clocks_freq_struct.ahb_freq / 10000) - 1); // 1s
// tmr_base_init(TMR14, (5000-1), (g_crm_clocks_freq_struct.ahb_freq / 1000000) - 1); // 5ms
//// tmr_base_init(TMR14, 9999, (g_crm_clocks_freq_struct.ahb_freq / 1000000) - 1); // 10ms
//
//
// tmr_cnt_dir_set(TMR14, TMR_COUNT_UP);
//
// tmr_interrupt_enable(TMR14, TMR_OVF_INT, TRUE);
//
// nvic_irq_enable(TMR14_GLOBAL_IRQn, 0, 0);
//
// tmr_counter_enable(TMR14, TRUE);
crm_periph_clock_enable(CRM_TMR15_PERIPH_CLOCK, TRUE);
//TODO: 定时的计算方法
// tmr_base_init(TMR6, 9999, (g_crm_clocks_freq_struct.ahb_freq / 10000) - 1); // 1s
tmr_base_init(TMR15, (5000-1), (g_crm_clocks_freq_struct.ahb_freq / 1000000) - 1); // 5ms
// tmr_base_init(TMR14, 9999, (g_crm_clocks_freq_struct.ahb_freq / 1000000) - 1); // 10ms
tmr_cnt_dir_set(TMR15, TMR_COUNT_UP);
tmr_interrupt_enable(TMR15, TMR_OVF_INT, TRUE);
nvic_irq_enable(TMR15_GLOBAL_IRQn, 0, 0);
tmr_counter_enable(TMR15, TRUE);
gpio_init_type gpio_init_struct;
gpio_default_para_init(&gpio_init_struct);
gpio_init_struct.gpio_pins = GPIO_PINS_1;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_init(GPIOB, &gpio_init_struct);
gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE1, GPIO_MUX_0);
crm_periph_clock_enable(CRM_TMR14_PERIPH_CLOCK, TRUE);
/* compute the prescaler value */
prescaler_value = (uint16_t)(system_core_clock / 24000000) - 1;
tmr_base_init(TMR14, 665, prescaler_value);
tmr_cnt_dir_set(TMR14, TMR_COUNT_UP);
tmr_clock_source_div_set(TMR14, TMR_CLOCK_DIV1);
tmr_output_default_para_init(&tmr_oc_init_structure);
tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
tmr_oc_init_structure.oc_idle_state = FALSE;
tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_oc_init_structure.oc_output_state = TRUE;
c1dt_val = 670;
tmr_output_channel_config(TMR14, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
tmr_channel_value_set(TMR14, TMR_SELECT_CHANNEL_1, c1dt_val);
tmr_output_channel_buffer_enable(TMR14, TMR_SELECT_CHANNEL_1, TRUE);
tmr_period_buffer_enable(TMR14, TRUE);
/* tmr enable counter */
tmr_counter_enable(TMR14, TRUE);
}
uint8_t g_cnt_pwm_red_low_timeout = 0;
void poll_red_pwm(void)
{
g_pulse_counter++;
if(g_pulse_counter >= 12){
g_pulse_counter = 0;
if(g_flag_pulse){
if(pulse < 500){
pulse += 100;
}
else{
pulse += 20;
}
if(pulse >= 670)
{
if(g_cnt_pwm_red_low_timeout < 3){
pulse = 665;
g_cnt_pwm_red_low_timeout++;
}
else{
g_flag_pulse = 0;
g_cnt_pwm_red_low_timeout = 0;
pulse = 660;
}
}
}
else{
if(pulse <= 600)
{
pulse -= 100;
}
else{
pulse -= 20;
}
if(pulse == 0){
g_flag_pulse = 1;
}
}
tmr_channel_value_set(TMR14, TMR_SELECT_CHANNEL_1, pulse);
}
}
/**
* @brief main function.
* @param none
* @retval none
*/
int main(void)
{
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
system_clock_config();
/* get system clock */
crm_clocks_freq_get(&g_crm_clocks_freq_struct);
at32_board_init();
/* init usart1 */
//2250000
// 115200
#ifdef DEBUG
uart_print_init(230400); //115200
PRINT("sys_clock:%d, ahb_freq:%d, sclk_freq:%d\n", system_core_clock, g_crm_clocks_freq_struct.ahb_freq, g_crm_clocks_freq_struct.sclk_freq);
#endif
loop_timer_io_init();
Timr6_Init();
/* enter critical */
taskENTER_CRITICAL();
/* create loop task */
if(xTaskCreate((TaskFunction_t )loop_task_function,
(const char* )"Loop_task",
(uint16_t )512,
(void* )NULL,
(UBaseType_t )2,
(TaskHandle_t* )&loop_task_handler) != pdPASS)
{
PRINT("loop task could not be created as there was insufficient heap memory remaining.\r\n");
}
else
{
PRINT("loop task was created successfully.\r\n");
}
/* exit critical */
taskEXIT_CRITICAL();
/* start scheduler */
vTaskStartScheduler();
}
uint8_t g_flag_output = 0;
uint8_t g_flag_output2 = 0;
// 1ms interval
void TMR6_GLOBAL_IRQHandler(void)
{
static uint16_t _cnt_5ms = 0;
static uint32_t _cnt = 0;
if(tmr_interrupt_flag_get(TMR6, TMR_OVF_FLAG) != RESET)
{
#ifdef DEBUG
_cnt++;
if(_cnt >= 2000){
g_flag_output = 1;
_cnt = 0;
}
#endif
tmr_flag_clear(TMR6, TMR_OVF_FLAG);
}
}
/**
* @}
*/
/**
* @}
*/