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feat(V4B): V4.36.36 — 就绪巩固期 Q 分级 (高5s/中7s/低10s)

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低Q 上电判稳完(绿灯灭)即压板 → 绿灯常亮 (系统未收敛完)
判稳完成(1204)后按 Q 档置巩固期, 绿灯继续慢闪至期满灭:
- READY_HOLD_HI=1000(5s)/MID=1400(7s)/LO=2000(10s) @5ms tick (poll_green_led 递减)
- 巩固期系统正常收敛(Origin/EMA/滤波) → 绿灯灭=可操作
- Q 档与 update_q_confirm_need 同口径 (f>100k 低/80~100k 中/≤80k 高)
- Loop stable 打印带 ready:Ns
语法0 error, 4测试全绿; spec V2.53 / devlog V2.71
This commit is contained in:
wangfq
2026-09-08 15:29:23 +08:00
parent 5cde26265f
commit d8411ef351
5 changed files with 36 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files
utilities/at32f421_freertos_demo/inc/TaskLoop.h
+5
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@@ -68,6 +68,11 @@
#define ORIGIN_LOWLEARN_TICKS 200 // V4.36.32: 冻结后降权低速补偿期 2000ms: 残余低值样本权重降 ×1/MULT
// 仿 PD132T 慢采样等效(10ms 快采样让 5s 窗装得快, 残余易拉低 Origin; 慢学更稳)
#define ORIGIN_LOWLEARN_MULT 5 // V4.36.32: 降权期均值窗放大 500→2500 样本(25s 窗), 学习速率 1/5
#define READY_HOLD_HI_TICKS 1000 // V4.36.36: 判稳后就绪巩固期 (5ms tick): 高Q 5s/中Q 7s/低Q 10s
// 低Q 上电自检刚完(绿灯灭)即压板易绿灯常亮 — 巩固期绿灯继续慢闪,
// 期间 Origin/EMA/滤波继续收敛, 绿灯灭才允许操作 (5s/7s/≥10s 用户拍板)
#define READY_HOLD_MID_TICKS 1400 // 中Q 7s
#define READY_HOLD_LO_TICKS 2000 // 低Q 10s
#define REL_CONFIRM_HI 3 // 高Q 释放确认样本
#define REL_CONFIRM_MID 4 // 中Q
#define REL_CONFIRM_LO 5 // 低Q: 释放边界抖动, 多样本防输出抖落
utilities/at32f421_freertos_demo/inc/cmcng.h
+2 -2
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@@ -14,11 +14,11 @@
#define __CMCNG_H__
#define PRODUCT_MODEL "DLD154"
#define FIRMWARE_VER "4.36.35" // 主.子.修订 (2026-09-03 起: 小改动只增 REV; MAIN/SUB 由产品定)
#define FIRMWARE_VER "4.36.36" // 主.子.修订 (2026-09-03 起: 小改动只增 REV; MAIN/SUB 由产品定)
#define HARDWARE_VER "3.00"
#define FIRMWARE_VER_MAIN 4
#define FIRMWARE_VER_SUB 36
#define FIRMWARE_VER_REV 35
#define FIRMWARE_VER_REV 36
#define HARDWARE_VER_MAIN 3
#define HARDWARE_VER_SUB 0
utilities/at32f421_freertos_demo/src/TaskLoop.c
+14 -2
View File
@@ -48,6 +48,7 @@ uint16_t g_origin_freeze_tick = 0; // V4.36.26/32: 释放后 Origin 全冻
uint16_t g_origin_lowlearn_tick = 0; // V4.36.32: 冻结后降权低速补偿计数 (2s, 残余低值降权学入)
uint16_t g_rel_band_cnt = 0; // V4.36.30: 低Q 环带超时兜底计数 (离开触发深度持续 2.5s → 强制释放)
uint32_t g_vacuum_ema = 0; // V4.36.31: 真空 EMA 基线 (B3: 释放/触发参考与锚错 Origin 解耦)
uint16_t g_ready_hold_tick = 0; // V4.36.36: 判稳后就绪巩固期计数 (5ms tick, poll_green_led 递减; 按 Q 档置 5s/7s/10s)
uint32_t loop1_Origin;
uint32_t loop1_ORG_SUM;
uint16_t loop1_ORG_CNT;
@@ -365,7 +366,9 @@ void poll_green_led(void)
static uint16_t _slow_tick = 0;
/*--- 自检阶段：慢闪（就绪过程指示；此阶段继电器未驱动） ---*/
if (loop1_INI_LOOP || !g_loop_power_up_state || !g_loop_stable) {
if (loop1_INI_LOOP || !g_loop_power_up_state || !g_loop_stable || g_ready_hold_tick > 0) {
/* V4.36.36: 就绪巩固期 (判稳后按 Q 档 5s/7s/10s) 绿灯继续慢闪, 递减放此 (ISR 5ms) */
if (g_ready_hold_tick > 0) g_ready_hold_tick--;
_slow_tick++;
if (_slow_tick >= GREEN_SLOW_HALF) {
_slow_tick = 0;
@@ -542,6 +545,7 @@ void INIT_VD(void)
g_origin_freeze_tick = 0; /* V4.36.26: 释放冻结计数清零 */
g_rel_band_cnt = 0; /* V4.36.30: 环带兜底计数清零 */
g_vacuum_ema = 0; /* V4.36.31: 真空 EMA 清零 (判稳后重建) */
g_ready_hold_tick = 0; /* V4.36.36: 就绪巩固期清零 (重建判稳时会再置) */
g_origin_lowlearn_tick = 0; /* V4.36.32: 降权期计数清零 */
loop1_CAP_OK = 0;
loop1_CAPVD = 0;
@@ -1205,7 +1209,15 @@ void vd1_task(void)
g_stable_cnt = 0; // 计数退出时清零: 二次稳定期(安全复位)从零开始
g_settle_cnt = 0;
g_vacuum_ema = loop1_Origin; /* V4.36.31: 判稳完成建立真空基线 */
PRINT("Loop stable, Origin:%d\n", loop1_Origin);
/* V4.36.36: 就绪巩固期按 Q 分档 (高Q 5s/中Q 7s/低Q 10s) — 绿灯继续慢闪期间系统收敛 */
{
uint32_t _f0 = calc_freq_khz(loop1_Origin, loop1_LPCNT);
if (_f0 > RECONNECT_Q_MID_F_KHZ) g_ready_hold_tick = READY_HOLD_LO_TICKS;
else if (_f0 > RECONNECT_Q_HI_F_KHZ) g_ready_hold_tick = READY_HOLD_MID_TICKS;
else g_ready_hold_tick = READY_HOLD_HI_TICKS;
}
PRINT("Loop stable, Origin:%d, ready:%us\n", loop1_Origin,
(unsigned)(g_ready_hold_tick / 200));
}
return;
}