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feat(V4B): V4.36.25 — 电感量三分语义: 合理窗 18~125k + 出窗一长一短 + 低于下限快闪

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用户设计拍板: 纠正 V4.36.22/23 把合理窗上限随下限推到 153/156 的偏差
- COIL_F_OK_MAX_KHZ 156→125 (恢复合理窗 18~125kHz=V4.36.9 口径, >125k=38µH 偏小)
- 新增 COIL_L_MIN_F_KHZ=156 (=COIL_L_MIN_UH 24µH, 43nF f@24µH=156.7k)
- coil_monitor want 三分: f<18k→1; f>156k→2(快闪断开级); 125k<f≤156k→1(一长一短)
  打印 too_large/too_small/below_l_min
- coil_monitor_recover 判据 18~156 (解除强制; 125~156 转原路径一长一短)
- test: 126→1 / 156→1 / 157→2; 全绿
语法0 error; spec V2.42 / manual / devlog V2.61
This commit is contained in:
wangfq
2026-09-07 10:01:12 +08:00
parent 5a3ab667bc
commit e0b86e9f6e
7 changed files with 51 additions and 22 deletions
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utilities/at32f421_freertos_demo/inc/cmcng.h
+2 -2
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@@ -14,11 +14,11 @@
#define __CMCNG_H__
#define PRODUCT_MODEL "DLD154"
#define FIRMWARE_VER "4.36.24" // 主.子.修订 (2026-09-03 起: 小改动只增 REV; MAIN/SUB 由产品定)
#define FIRMWARE_VER "4.36.25" // 主.子.修订 (2026-09-03 起: 小改动只增 REV; MAIN/SUB 由产品定)
#define HARDWARE_VER "3.00"
#define FIRMWARE_VER_MAIN 4
#define FIRMWARE_VER_SUB 36
#define FIRMWARE_VER_REV 24
#define FIRMWARE_VER_REV 25
#define HARDWARE_VER_MAIN 3
#define HARDWARE_VER_SUB 0