wangfq
ac3fda09e2
硬件修复(用户): 拨码三极管 5.1K→0Ω → 第二颗33nF真正并联 0Ω板低频档实测: 52k/136µH→C_eff=68.9; 127k/23µH→68.3; 88k/48µH→68.1 (均值68.4≈名义66) → V4.28 的 43nF 为 5.1K 旧板带病特性(三极管未饱和导通, 并联只等效+8.6nF), 作废 改动: COIL_CAL_C_NF 43→68; 33nF档标定34(旧板)待0Ω板复测 验证: 68 回代残差 ≤1.5% (52k→138vs136; 127k→23vs23; 88k→48vs48) 文档: devlog V2.27 / spec V2.8 / design doc v0.6
73 lines
1.7 KiB
C
73 lines
1.7 KiB
C
/**
|
|
**************************************************************************
|
|
* @file cmcng.h
|
|
* @version v1.0
|
|
* @date 2025-09-08
|
|
* @brief һЩÅäÖÃ
|
|
**************************************************************************
|
|
* Copyright notice & Disclaimer
|
|
* * Create 2025-09-08 by wangfq
|
|
* *
|
|
**************************************************************************
|
|
*/
|
|
#ifndef __CMCNG_H__
|
|
#define __CMCNG_H__
|
|
|
|
#define PRODUCT_MODEL "DLD154"
|
|
#define FIRMWARE_VER "4.29"
|
|
#define HARDWARE_VER "3.00"
|
|
#define FIRMWARE_VER_MAIN 4
|
|
#define FIRMWARE_VER_SUB 29
|
|
#define HARDWARE_VER_MAIN 3
|
|
#define HARDWARE_VER_SUB 0
|
|
|
|
|
|
#include <stdio.h>
|
|
#include <stdint.h>
|
|
|
|
|
|
#ifdef DEBUG
|
|
#define PRINT(X...) printf(X)
|
|
#else
|
|
#define PRINT(X...)
|
|
#endif
|
|
|
|
|
|
|
|
typedef struct _LOOP_ACS_INFO
|
|
{
|
|
uint8_t flag_event;
|
|
uint8_t loop_num;
|
|
uint8_t freq_level;
|
|
uint8_t sensity;
|
|
uint8_t relay1_cng;
|
|
uint8_t relay1_state;
|
|
uint8_t relay2_cng;
|
|
uint8_t relay2_state;
|
|
uint8_t loop_state;
|
|
uint8_t output_mode;
|
|
uint8_t dir_mode;
|
|
uint8_t delay;
|
|
uint8_t car_state;
|
|
uint8_t direction;
|
|
uint8_t flag_loop_safe;
|
|
uint32_t loop_safe_counter;
|
|
uint8_t condition;
|
|
uint32_t frequent;
|
|
uint32_t loop_capvd;
|
|
int16_t variation;
|
|
uint32_t event_counter;
|
|
uint32_t report_counter;
|
|
} Loop_ACS_Info;
|
|
extern Loop_ACS_Info g_loop_acs_info;
|
|
|
|
|
|
extern uint8_t g_flag_output;
|
|
extern uint8_t g_flag_output2;
|
|
|
|
extern uint8_t g_input_div;
|
|
|
|
|
|
|
|
#endif
|