/********************************** (C) COPYRIGHT *******************************
 * File Name          : ch32v20x_it.c
 * Author             : WCH
 * Version            : V1.0.0
 * Date               : 2022/06/16
 * Description        : Main Interrupt Service Routines.
 *********************************************************************************
 * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
 * Attention: This software (modified or not) and binary are used for 
 * microcontroller manufactured by Nanjing Qinheng Microelectronics.
 *******************************************************************************/

/*********************************************************************
 * INCLUDES
 */
#include "ch32v20x_it.h"
#include "eth_driver.h"
#include "CONFIG.h"
#include "debug.h"

/*********************************************************************
 * LOCAL FUNCTIONS
 */
void NMI_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void BB_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void ETH_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void TIM2_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));


/*********************************************************************
 * @fn      NMI_Handler
 *
 * @brief   This function handles NMI exception.
 *
 * @return  None
 */
void NMI_Handler(void)
{
}

/*********************************************************************
 * @fn      HardFault_Handler
 *
 * @brief   This function handles Hard Fault exception.
 *
 * @return  None
 */
void HardFault_Handler(void)
{
    /* 诊断 (2026-08-13): 抓 RISC-V 异常现场, 定位 HardFault 源头
       mcause: 5=Load访问错误 7=Store访问错误 2=非法指令 4/6=未对齐
       mepc  : 异常指令 PC (用 .map 文件反查函数)
       mtval : 错误访问地址 (Load/Store fault 时=野指针地址) */
    uint32_t _mcause = 0, _mepc = 0, _mtval = 0;
    __asm__ volatile("csrr %0, 0x342" : "=r"(_mcause));
    __asm__ volatile("csrr %0, 0x341" : "=r"(_mepc));
    __asm__ volatile("csrr %0, 0x343" : "=r"(_mtval));
    PRINT("HARDFAULT: mcause=0x%08lx mepc=0x%08lx mtval=0x%08lx\n",
          (unsigned long)_mcause, (unsigned long)_mepc, (unsigned long)_mtval);
    NVIC_SystemReset();
    while(1)
    {
    }
}

/*********************************************************************
 * @fn      BB_IRQHandler
 *
 * @brief   BB Interrupt for BLE.
 *
 * @return  None
 */
void BB_IRQHandler(void)
{
    BB_IRQLibHandler();
}


/*********************************************************************
 * @fn      ETH_IRQHandler
 *
 * @brief   This function handles ETH exception.
 *
 * @return  none
 */
void ETH_IRQHandler(void)
{
    WCHNET_ETHIsr();
}

void TIM2_IRQHandler( void ) 					                             	
{
    WCHNET_TimeIsr(WCHNETTIMERPERIOD);                                     
	TIM_ClearITPendingBit(TIM2, TIM_IT_Update);			
}