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feat(V4B): V4.35 — 频率窗上限复核 92→108kHz (43nF板口径≈50µH)

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V4.33 的 92k 是 0Ω 实验板(68nF)语境; 产品回到三极管板(43nF)后 92k≈70µH 过严,
40~70µH 正常线圈会误报 → 上限 108k = L≈50µH (保留最小合理线圈)
test_coil_range 边界 108/109 全绿; 语法 0 error
文档: devlog V2.33 / spec V2.14 / manual V2.11
This commit is contained in:
wangfq
2026-09-03 17:13:00 +08:00
parent be91c584ee
commit f6e2a82935
6 changed files with 47 additions and 14 deletions
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utilities/at32f421_freertos_demo/inc/TaskLoop.h
+1 -1
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@@ -49,7 +49,7 @@
#define ENV_WARN_WAIT 200 // 环境预判 (V4.31): dev>+4dlt 高位连续 ~2s → 黄灯预判锁存(回摆保持)
#define ENV_RECOVER_WAIT 200 // 恢复确认 (V4.31): 新基线替换后 环境空闲连续 ~2s 才解除预判, 黄灯灭
#define COIL_F_OK_MIN_KHZ 20 // 线圈频率合理窗 (V4.26): 默认低频档口径, <20kHz → L偏大
#define COIL_F_OK_MAX_KHZ 92 // 线圈频率合理窗 (V4.32): >92kHz → L偏小 (原120)
#define COIL_F_OK_MAX_KHZ 108 // 线圈频率合理窗 (V4.35): >108kHz → L偏小 (43nF板口径, ≈50µH; 原92@68nF实验板→92@43nF≈70µH过严, 2026-09-03复核)
#define COIL_CAL_C_NF 43 // 标定等效谐振电容 nF (V4.34): 三极管库存板 低频档(66nF名义, R19在/R27空)实测 C_eff≈43 (41.3~45.5; 0Ω板68仅实验口径, 产品不用)
// 旧43 = 5.1K电阻旧板带病特性(三极管开关未饱和导通, 第二颗33nF未全量并入), 作废
#define COIL_CAL_C_NF_33 34 // 高频档(33nF名义)标定值: 实测 C_eff≈34.4 (33.8~35.0, 3组) — 用33nF档时改 COIL_CAL_C_NF 为34
utilities/at32f421_freertos_demo/inc/cmcng.h
+2 -2
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@@ -14,10 +14,10 @@
#define __CMCNG_H__
#define PRODUCT_MODEL "DLD154"
#define FIRMWARE_VER "4.34"
#define FIRMWARE_VER "4.35"
#define HARDWARE_VER "3.00"
#define FIRMWARE_VER_MAIN 4
#define FIRMWARE_VER_SUB 34
#define FIRMWARE_VER_SUB 35
#define HARDWARE_VER_MAIN 3
#define HARDWARE_VER_SUB 0