Files
DLD154V4B/utilities/at32f421_freertos_demo/inc/cmcng.h
T
wangfq 6b7d624ff0 fix(V4B): V4.27 — 频率测量 4 倍偏差修正 (示波器 30.23k vs 打印 7k)
根因(两处2倍叠加):
1. calc_freq_khz 常数 60000 按 60MHz 假设; 实际 TMR3 计数时钟=sclk=120MHz (HEXT×10, AHB/APB1÷1)
2. 输入捕获 DIV_2 (每2边沿捕获, Xn 翻倍), g_input_div 从未参与换算
→ Xn=2×120M/f_real, f_print=f_real/4 (30.23/4=7.56✓ 36.82/4=9.21✓)

改动: calc 60000→240000 (注释推导); coil_l_uH 改随 f_kHz (25330000/(f²×C66));
      DBG/EVT 用同一 _fk; 版本 V4.27; spec §4.1.2 文字更正 + devlog/design v0.4 标注影响

影响: 旧日志 f/L 需×4 (16.3kHz 假象实为 65.2kHz≈90µH 正常线圈); V4.26 告警窗随真实 f 自洽
2026-09-03 11:49:43 +08:00

73 lines
1.7 KiB
C

/**
**************************************************************************
* @file cmcng.h
* @version v1.0
* @date 2025-09-08
* @brief һЩÅäÖÃ
**************************************************************************
* Copyright notice & Disclaimer
* * Create 2025-09-08 by wangfq
* *
**************************************************************************
*/
#ifndef __CMCNG_H__
#define __CMCNG_H__
#define PRODUCT_MODEL "DLD154"
#define FIRMWARE_VER "4.27"
#define HARDWARE_VER "3.00"
#define FIRMWARE_VER_MAIN 4
#define FIRMWARE_VER_SUB 27
#define HARDWARE_VER_MAIN 3
#define HARDWARE_VER_SUB 0
#include <stdio.h>
#include <stdint.h>
#ifdef DEBUG
#define PRINT(X...) printf(X)
#else
#define PRINT(X...)
#endif
typedef struct _LOOP_ACS_INFO
{
uint8_t flag_event;
uint8_t loop_num;
uint8_t freq_level;
uint8_t sensity;
uint8_t relay1_cng;
uint8_t relay1_state;
uint8_t relay2_cng;
uint8_t relay2_state;
uint8_t loop_state;
uint8_t output_mode;
uint8_t dir_mode;
uint8_t delay;
uint8_t car_state;
uint8_t direction;
uint8_t flag_loop_safe;
uint32_t loop_safe_counter;
uint8_t condition;
uint32_t frequent;
uint32_t loop_capvd;
int16_t variation;
uint32_t event_counter;
uint32_t report_counter;
} Loop_ACS_Info;
extern Loop_ACS_Info g_loop_acs_info;
extern uint8_t g_flag_output;
extern uint8_t g_flag_output2;
extern uint8_t g_input_div;
#endif