95808f9f25
- 用 DLD154V4B vd1_task/per_channel 替换 vds_task 复杂算法
- 移除 FUNCTION_B/二次判断/快速变化/多重确认等增强特性
- 保留平坦性离开算法 (CN200910309382)，每通道独立状态
- 灵敏度表改为 DLD154V4B 4级: {216,108,36,10} / {108,72,18,9}
- 清理废弃类型: FltHistoryManager, Loop_ACS_Info, StageRangeConfig 等
- 首次添加 vd960DBN 完整源码
73 lines
2.5 KiB
C
73 lines
2.5 KiB
C
/********************************** (C) COPYRIGHT *******************************
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* File Name : ch32v20x_misc.h
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* Author : WCH
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : This file contains all the functions prototypes for the
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* miscellaneous firmware library functions.
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Attention: This software (modified or not) and binary are used for
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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*******************************************************************************/
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#ifndef __CH32V20x_MISC_H
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#define __CH32V20x_MISC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "ch32v20x.h"
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/* CSR_INTSYSCR_INEST_definition */
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#define INTSYSCR_INEST_NoEN 0x00 /* interrupt nesting disable(CSR-0x804 bit1 = 0) */
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#define INTSYSCR_INEST_EN 0x01 /* interrupt nesting enable(CSR-0x804 bit1 = 1) */
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/* Check the configuration of CSR(0x804) in the startup file(.S)
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* interrupt nesting enable(CSR-0x804 bit1 = 1)
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* priority - bit[7] - Preemption Priority
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* bit[6:5] - Sub priority
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* bit[4:0] - Reserve
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* interrupt nesting disable(CSR-0x804 bit1 = 0)
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* priority - bit[7:5] - Sub priority
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* bit[4:0] - Reserve
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*/
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#ifndef INTSYSCR_INEST
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#define INTSYSCR_INEST INTSYSCR_INEST_EN
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#endif
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/* NVIC Init Structure definition
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* interrupt nesting enable(CSR-0x804 bit1 = 1)
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* NVIC_IRQChannelPreemptionPriority - range from 0 to 1.
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* NVIC_IRQChannelSubPriority - range from 0 to 3.
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*
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* interrupt nesting disable(CSR-0x804 bit1 = 0)
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* NVIC_IRQChannelPreemptionPriority - range is 0.
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* NVIC_IRQChannelSubPriority - range from 0 to 7.
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*
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*/
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typedef struct
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{
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uint8_t NVIC_IRQChannel;
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uint8_t NVIC_IRQChannelPreemptionPriority;
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uint8_t NVIC_IRQChannelSubPriority;
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FunctionalState NVIC_IRQChannelCmd;
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} NVIC_InitTypeDef;
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/* Preemption_Priority_Group */
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#if (INTSYSCR_INEST == INTSYSCR_INEST_NoEN)
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#define NVIC_PriorityGroup_0 ((uint32_t)0x00) /* interrupt nesting disable(CSR-0x804 bit1 = 0) */
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#else
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#define NVIC_PriorityGroup_1 ((uint32_t)0x01) /* interrupt nesting enable(CSR-0x804 bit1 = 1) */
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#endif
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void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup);
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void NVIC_Init(NVIC_InitTypeDef *NVIC_InitStruct);
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#ifdef __cplusplus
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}
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#endif
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#endif
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