- 用 DLD154V4B vd1_task/per_channel 替换 vds_task 复杂算法
- 移除 FUNCTION_B/二次判断/快速变化/多重确认等增强特性
- 保留平坦性离开算法 (CN200910309382),每通道独立状态
- 灵敏度表改为 DLD154V4B 4级: {216,108,36,10} / {108,72,18,9}
- 清理废弃类型: FltHistoryManager, Loop_ACS_Info, StageRangeConfig 等
- 首次添加 vd960DBN 完整源码
236 lines
6.7 KiB
C
236 lines
6.7 KiB
C
/**
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**************************************************************************
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* @file at32f421_scfg.c
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* @brief contains all the functions for the system config firmware library
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**************************************************************************
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* Copyright notice & Disclaimer
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*
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* The software Board Support Package (BSP) that is made available to
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* download from Artery official website is the copyrighted work of Artery.
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* Artery authorizes customers to use, copy, and distribute the BSP
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* software and its related documentation for the purpose of design and
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* development in conjunction with Artery microcontrollers. Use of the
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* software is governed by this copyright notice and the following disclaimer.
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*
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* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
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* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
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* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
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* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
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* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
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*
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**************************************************************************
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*/
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#include "at32f421_conf.h"
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/** @addtogroup AT32F421_periph_driver
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* @{
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*/
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/** @defgroup SCFG
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* @brief SCFG driver modules
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* @{
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*/
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#ifdef SCFG_MODULE_ENABLED
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/** @defgroup SCFG_private_functions
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* @{
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*/
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/**
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* @brief scfg reset
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* @param none
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* @retval none
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*/
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void scfg_reset(void)
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{
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crm_periph_reset(CRM_SCFG_PERIPH_RESET, TRUE);
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crm_periph_reset(CRM_SCFG_PERIPH_RESET, FALSE);
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}
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/**
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* @brief scfg infrared config
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* @param source
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* this parameter can be one of the following values:
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* - SCFG_IR_SOURCE_TMR16
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* @param polarity
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* this parameter can be one of the following values:
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* - SCFG_IR_POLARITY_NO_AFFECTE
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* - SCFG_IR_POLARITY_REVERSE
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* @retval none
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*/
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void scfg_infrared_config(scfg_ir_source_type source, scfg_ir_polarity_type polarity)
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{
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SCFG->cfg1_bit.ir_src_sel = source;
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SCFG->cfg1_bit.ir_pol = polarity;
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}
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/**
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* @brief scfg memory address mapping get
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* @param none
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* @retval return parameter can be one of the following values:
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* - SCFG_MEM_MAP_MAIN_MEMORY
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* - SCFG_MEM_MAP_BOOT_MEMORY
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* - SCFG_MEM_MAP_INTERNAL_SRAM
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*/
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uint8_t scfg_mem_map_get(void)
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{
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return (uint8_t)SCFG->cfg1_bit.mem_map_sel ;
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}
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/**
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* @brief scfg pa11/12 pin remap
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* @param pin_remap
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* this parameter can be one of the following values:
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* - SCFG_PA11PA12_NO_REMAP
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* - SCFG_PA11PA12_TO_PA9PA10
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* @retval none
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*/
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void scfg_pa11pa12_pin_remap(scfg_pa11pa12_remap_type pin_remap)
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{
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SCFG->cfg1_bit.pa11_12_rmp = pin_remap;
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}
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/**
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* @brief scfg adc dma channel remap
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* @param dma_channel
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* this parameter can be one of the following values:
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* - SCFG_ADC_TO_DMA_CHANNEL_1
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* - SCFG_ADC_TO_DMA_CHANNEL_2
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* @retval none
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*/
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void scfg_adc_dma_channel_remap(scfg_adc_dma_remap_type dma_channel)
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{
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SCFG->cfg1_bit.adc_dma_rmp = dma_channel;
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}
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/**
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* @brief scfg usart1 tx dma channel remap
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* @param dma_channel
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* this parameter can be one of the following values:
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* - SCFG_USART1_TX_TO_DMA_CHANNEL_2
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* - SCFG_USART1_TX_TO_DMA_CHANNEL_4
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* @retval none
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*/
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void scfg_usart1_tx_dma_channel_remap(scfg_usart1_tx_dma_remap_type dma_channel)
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{
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SCFG->cfg1_bit.usart1_tx_dma_rmp = dma_channel;
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}
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/**
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* @brief scfg usart1 rx dma channel remap
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* @param dma_channel
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* this parameter can be one of the following values:
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* - SCFG_USART1_RX_TO_DMA_CHANNEL_3
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* - SCFG_USART1_RX_TO_DMA_CHANNEL_5
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* @retval none
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*/
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void scfg_usart1_rx_dma_channel_remap(scfg_usart1_rx_dma_remap_type dma_channel)
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{
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SCFG->cfg1_bit.usart1_rx_dma_rmp = dma_channel;
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}
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/**
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* @brief scfg tmr16 dma channel remap
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* @param dma_channel
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* this parameter can be one of the following values:
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* - SCFG_TMR16_TO_DMA_CHANNEL_3
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* - SCFG_TMR16_TO_DMA_CHANNEL_4
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* @retval none
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*/
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void scfg_tmr16_dma_channel_remap(scfg_tmr16_dma_remap_type dma_channel)
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{
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SCFG->cfg1_bit.tmr16_dma_rmp = dma_channel;
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}
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/**
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* @brief scfg tmr17 dma channel remap
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* @param dma_channel
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* this parameter can be one of the following values:
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* - SCFG_TMR17_TO_DMA_CHANNEL_1
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* - SCFG_TMR17_TO_DMA_CHANNEL_2
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* @retval none
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*/
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void scfg_tmr17_dma_channel_remap(scfg_tmr17_dma_remap_type dma_channel)
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{
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SCFG->cfg1_bit.tmr17_dma_rmp = dma_channel;
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}
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/**
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* @brief select the gpio pin used as exint line.
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* @param port_source:
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* select the gpio port to be used as source for exint lines.
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* this parameter can be one of the following values:
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* - SCFG_PORT_SOURCE_GPIOA
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* - SCFG_PORT_SOURCE_GPIOB
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* - SCFG_PORT_SOURCE_GPIOC
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* - SCFG_PORT_SOURCE_GPIOF
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* @param pin_source:
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* specifies the exint line to be configured.
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* this parameter can be one of the following values:
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* - SCFG_PINS_SOURCE0
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* - SCFG_PINS_SOURCE1
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* - SCFG_PINS_SOURCE2
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* - SCFG_PINS_SOURCE3
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* - SCFG_PINS_SOURCE4
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* - SCFG_PINS_SOURCE5
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* - SCFG_PINS_SOURCE6
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* - SCFG_PINS_SOURCE7
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* - SCFG_PINS_SOURCE8
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* - SCFG_PINS_SOURCE9
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* - SCFG_PINS_SOURCE10
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* - SCFG_PINS_SOURCE11
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* - SCFG_PINS_SOURCE12
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* - SCFG_PINS_SOURCE13
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* - SCFG_PINS_SOURCE14
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* - SCFG_PINS_SOURCE15
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* @retval none
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*/
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void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
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{
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uint32_t tmp = 0x00;
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tmp = ((uint32_t)0x0F) << (0x04 * (pin_source & (uint8_t)0x03));
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switch (pin_source >> 0x02)
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{
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case 0:
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SCFG->exintc1 &= ~tmp;
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SCFG->exintc1 |= (((uint32_t)port_source) << (0x04 * (pin_source & (uint8_t)0x03)));
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break;
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case 1:
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SCFG->exintc2 &= ~tmp;
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SCFG->exintc2 |= (((uint32_t)port_source) << (0x04 * (pin_source & (uint8_t)0x03)));
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break;
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case 2:
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SCFG->exintc3 &= ~tmp;
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SCFG->exintc3 |= (((uint32_t)port_source) << (0x04 * (pin_source & (uint8_t)0x03)));
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break;
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case 3:
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SCFG->exintc4 &= ~tmp;
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SCFG->exintc4 |= (((uint32_t)port_source) << (0x04 * (pin_source & (uint8_t)0x03)));
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break;
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default:
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break;
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}
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}
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/**
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* @}
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*/
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#endif
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/**
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* @}
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*/
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/**
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* @}
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*/
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