• Joined on 2026-04-10
wangfq pushed to main at wangfq/DLD154V4B 2026-09-11 17:53:20 +08:00
d5e6a3d55b feat(V4B): V4.36.44 — 铁板负偏差误释放防护(P1) + 有车最小保持定档 100ms
wangfq pushed to main at wangfq/DLD154V4B 2026-09-11 17:06:10 +08:00
6c82bf61b8 fix(V4B): V4.36.43 — 修正 V4.36.42 引入的离开变慢 (G3 计时器递减位置错误)
wangfq pushed to main at wangfq/DLD154V4B 2026-09-11 16:59:30 +08:00
0f8a0d6fbd fix(V4B): V4.36.42 — 低Q 临界悬停自激根治 (进/出参考统一 + 释放带夹紧 + 最小保持)
wangfq pushed to main at wangfq/DLD154V4B 2026-09-11 14:08:31 +08:00
5fd58e035a fix(V4B): V4.36.41 — 环境重校准后触发高度变低根治 (基准/派生参考同步 + EMA 余数累加)
wangfq pushed to master at wangfq/vd-analysis 2026-09-11 11:28:00 +08:00
db5e108620 fig(family): 六型号总览图 + PD132T↔PD136HA 档位对齐图;待实测清单 ⑧
wangfq pushed to master at wangfq/vd-analysis 2026-09-11 11:15:11 +08:00
9c88b1d7b0 fig(compare): PD132T↔PD136HA 响应对比图(时域 + 延迟扫描)
wangfq pushed to master at wangfq/vd-analysis 2026-09-11 10:21:44 +08:00
91ed16a9b8 docs(measurement): 新增 PD132T 端到端时序图(三段横轴)+ 符号约定勘误 + 生成工具
wangfq pushed to master at wangfq/vd-analysis 2026-09-11 09:35:58 +08:00
3a679ee373 docs(measurement): §9 时序链详解 —— Xn / Value / CAPVD / Origin 六个量的更新时间(用户提出)
wangfq pushed to master at wangfq/vd-analysis 2026-09-11 09:25:51 +08:00
fc243c010c docs(measurement): 测量节拍是区间 —— 周期累积法的窗口量化(用户提出)+ 全仓回灌
wangfq pushed to master at wangfq/vd-analysis 2026-09-11 09:13:47 +08:00
0c05726699 docs(cross-model): 总表审计复核 —— M1H 捕获时钟勘误(1.0MHz→4MHz/8.19ms)+ 新增捕获沿/捕获时钟/判据常数三行
wangfq pushed to master at wangfq/vd-analysis 2026-09-11 08:54:20 +08:00
f876c36d05 docs: 新增 PD132T ↔ PD136HA 同血统两代对比分析(8051 → Cortex-M0+)
wangfq pushed to master at wangfq/vd-analysis 2026-09-11 08:47:44 +08:00
382a23594c docs(MA801): 官方手册直证 —— PD132T 捕获时钟 3MHz/10.92ms 全链闭环,间接论证升级为直证
wangfq pushed to master at wangfq/vd-analysis 2026-09-11 08:42:43 +08:00
01d574c4a9 docs: MCU 归属更正(PD132T=Megawin MA801 / PD136HA=HC32F003C4)+ 双沿捕获⇒Xn 半周期口径
wangfq pushed to master at wangfq/vd-analysis 2026-09-11 08:32:14 +08:00
f5bdbfae05 docs(PD136HA): 外部晶振 12MHz 用户确认 ⇒ PCLK0/捕获时钟/测量窗落定,前端全链闭合
wangfq pushed to master at wangfq/vd-analysis 2026-09-11 03:23:59 +08:00
7cf090d1b0 docs(front-end): §2.3 勘误措辞收紧(旧推算为 T0 走 SYSCLK/4,非 /12)
wangfq pushed to master at wangfq/vd-analysis 2026-09-11 03:23:30 +08:00
55a39f740a docs(front-end): 图纸取证钉死 CD4060 分频比 = ÷32(Q5);勘误 PD132T 捕获时钟 0.75MHz→3MHz
wangfq pushed to master at wangfq/vd-analysis 2026-09-11 02:39:39 +08:00
dfba2dfdb9 docs(hw-frontend): PD132T↔V4B 前端专项补 §8 PD136HA 侧; 对齐报告 §2.3 与 PD132T 交叉比对收紧分频比反推
wangfq pushed to master at wangfq/vd-analysis 2026-09-11 02:38:19 +08:00
a2d57eebd2 docs(pd136ha→v4b): 新增 §2 硬件前端电路对齐(CD4060 分频 vs 直连振荡)+ 全节重编号
wangfq pushed to master at wangfq/vd-analysis 2026-09-11 02:24:15 +08:00
96ba80bcb3 docs: 新增 PD136HA → DLD154V4B 交付对齐分析(替换评估)
wangfq pushed to main at wangfq/vd_960 2026-09-10 22:59:35 +08:00
12618578d8 docs: §6.9 补 BLE 分包承载与缓冲边界 + 4 条实现前置项 (V1.15)